The manufacture of a semiconductor power device typically entails metallization of the backside of the silicon wafer to form a drain terminal. To maximize device performance, such backmetal films or film stacks must have low ohmic contact resistance and high thermal conductivity. To reduce the contribution of the substrate to overall operational resistance and to meet advanced packaging requirements, wafers for power devices are typically back thinned, frequently to less than 14 mils, which requires that the backmetal films on these thin wafers also have low tensile or compressive stress. Furthermore, device packaging considerations frequently require that the total combined thickness of the die and backmetal film stack be decreased and that the backmetal be solderable to allow solder mounting of the die on a lead frame.
Solderable backmetal stacks known in the art is typically comprise some combination of Ag, Al, Au, Cr, Ni, or Ti films, which all have varying stresses and thicknesses. The additive stress characteristics of unpatterned metal films have a significant effect on the overall stress induced on a wafer, causing considerable concave deformation, or warpage, of the wafer, and consequent wafer breakage in subsequent process operations. The effect of the backmetal stress on wafer bow increases in severity with increasing diameter and decreasing thickness of the wafer, trends that are ongoing in power device manufacturing.
There is a need for backmetal drain terminals with low resistance, high thermal conductivity, low tensile or compressive stress, and ready solderability to a frame. The present invention meets this need.